Online ISSN: 2515-8260

Keywords : approximate adder


AN EFFICIENT DESIGN OF MULTIPLIER AND ADDER IN QUANTUM-DOT CELLULAR AUTOMATA TECHNOLOGY USING MAJORITY LOGIC

N. BHAVANI SUDHA; GAMINI SRIDEVI

European Journal of Molecular & Clinical Medicine, 2020, Volume 7, Issue 11, Pages 5252-5262

Approximate computer arithmetic circuits based on CMOS technology have been extensively studied. Designs of approximate adders, multipliers and dividers for both fixed point and floating-point formats have been proposed. As a new paradigm in the nano scale technologies, approximate computing enables error tolerance in the computational process, it has also emerged as a low power design methodology for arithmetic circuits. Majority logic (ML) is applicable to many emerging technologies and its basic building block (the 3-input majority voter) has been extensively used in digital circuit design. In this project, we propose the design of a one bit approximate full adder based on majority logic.Furthermore, multi-bit approximate full adders are also proposed and studied, the application of these designs to quantum-dot cellular automata (QCA) is also presented as an example. The designs are evaluated using hardware metrics (including delay and area) as well as error metrics. Compared with other circuits found in the technical literature, the optimal designs are found to offer superior performance. Approximate half adder and full adder is designed. These Half adder and Full adder combinations are used to implement the Brent Kung Adder and multiplier. In the present work fast adders like RCA adders using compressor methodology and multiplication operations are performed by utilizing Majority gates. This paper also proposes the Wallace tree multiplier using proposed majority based Full adder .The designed multiplier is effective and efficient in terms of area-delay trade off, delay(speed) and power utilization.Project will be developed using verilog HDL. Xilinx ISE tool is used to perform the Simulation and Synthesis.

ENERGY-EFFICIENT FILTER DESIGN USING REVERSE CARRY PROPAGATE ADDERS

G.UMA MAHESWARI; T.SRINIVASA RAO

European Journal of Molecular & Clinical Medicine, 2020, Volume 7, Issue 11, Pages 5242-5251

The reverse propagate adder (RCPA) is presented in this project. In this project. Under the RCPA framework, the transmission signal stretches from the most important to the less significant bit in a counter-flow way; thus the transportation signal is more appropriate than the production. In the case of delay differences, this propagation process improves stability. The cell with a varying pause, capacity, energy and accuracy are implemented in three separate implementations of the reverse transportation (RCPFA). The configuration suggested can be linked along with the precise (forward) adder to shape the hybrid adders with precise tuning levels. In contrast to modern estimated additions, the specification parameters of the proposed RCPA architectures and several hybrids that have  been implemented using these frameworks are discussed. Using Reverse Carrier Adder(RCPA), the Fir Filter is applied. Project with Verilog will be created. For simulation and synthesis, the Xilinx ISE tool is used.