Keywords : Four-bit LFSR
European Journal of Molecular & Clinical Medicine,
2020, Volume 7, Issue 4, Pages 2893-2902
Digital systems performance is often governed by performance of flip flops and timing elements. Several Sense Amplifier based Flip Flops (SAFF) are reported in literature but they suffer with current contention and glitches. To overcome this, glitch free circuit is designed for Strollo’s SAFF. This improved design has been successfully employed in four bit Linear Feedback Shift Register (LFSR). Further, these are implemented using 45nm technology. Simulation results validate the superiority of the proposed design to existing SAFFs in terms of average power consumption. Asynchronous single pulse is applied to the Strollo’s SAFF with glitch free, resulting in a change in one output of four-bit LFSR. This is considered as a fault or test vector. The single stuck-at-fault method is used to correct the detected fault in the designed four-bit LFSR at the other end. This implementation is helpful in developing data protection circuits.