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  2. Volume 7, Issue 4
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Online ISSN: 2515-8260

Volume7, Issue4

Power Efficient Shift Register Using Leakage Control NMOS Transistor

    Manish Kumar Abhay Chaturvedi

European Journal of Molecular & Clinical Medicine, 2020, Volume 7, Issue 4, Pages 137-144

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Abstract

VLSI is a stream of electronics engineering thatoccupy putting millions and billions of transistors logically together on to a single chip. VLSI circuits play a vital role in modern digitalized world. FLIP-FLOPS (FFs) are the main storage elements utilized in digital system propose, that constitutes registers, shift registers, counters etc. The current utilization of the FFs employed in a typical digital design has a great influence on its performance. This paperpresentsthe design of a SISO (Serial In Serial Out) register using LCNT(Leakage Control NMOS Transistor) based D Flip Flop. The functional verification is done in mentor graphics tool. The obtained results matching with the expected ones and the comparative analysis with the previous design techniques shows that thiswill be an effective solution for the future low power register designs
Keywords:
    LCNT SISO
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(2020). Power Efficient Shift Register Using Leakage Control NMOS Transistor. European Journal of Molecular & Clinical Medicine, 7(4), 137-144.
Manish Kumar; Abhay Chaturvedi. "Power Efficient Shift Register Using Leakage Control NMOS Transistor". European Journal of Molecular & Clinical Medicine, 7, 4, 2020, 137-144.
(2020). 'Power Efficient Shift Register Using Leakage Control NMOS Transistor', European Journal of Molecular & Clinical Medicine, 7(4), pp. 137-144.
Power Efficient Shift Register Using Leakage Control NMOS Transistor. European Journal of Molecular & Clinical Medicine, 2020; 7(4): 137-144.
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