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  2. Volume 7, Issue 9
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Online ISSN: 2515-8260

Volume7, Issue9

DESIGN OF 4-BIT MULTIPLIER ACCUMULATOR UNIT BY USING REVERSIBLE LOGIC GATES IN PERES LOGIC

    Dr.K. Gunasekaran Chanda Laxmana Sudheer V. Sornagopal Dr.M. Gnanasekaran

European Journal of Molecular & Clinical Medicine, 2020, Volume 7, Issue 9, Pages 2415-2422

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Abstract

—In VLSI circuits Heat is a major problem. However, in reversible logic, the measurement of heat dissipation is zero. In this sense, it is an important work in nanotechnology, low energy complementary metal oxide semiconductor structures [CMOS]. For reversible logic, no results are lost. However, this limits the delay in the scope of the hardware equipment. Therefore, reversible logic technology can be used to reduce energy distribution, reduce heat wave propagation and increase speed. Therefore, it is used to increase speed and reduce energy consumption. In this paper we are going to represent the following reversible logic gates, such as Fredkin gates, Peres, Feynman, Toffoli. This paper proposes a reversible logic design of a 4-bit MAC structure using Peres gates as reversible logic blocks. In addition, a variety of parameters, along with those of conventional computing, perform a relative test between classical style and quantum logic operation. The proposed approach is implemented using Xilinx-7 FPGA in VHDL.
Keywords:
    Reversible logic gates Fredkin Peres Feynman Toffoli MAC Array Multiplier and Ripple Carry Adder
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(2022). DESIGN OF 4-BIT MULTIPLIER ACCUMULATOR UNIT BY USING REVERSIBLE LOGIC GATES IN PERES LOGIC. European Journal of Molecular & Clinical Medicine, 7(9), 2415-2422.
Dr.K. Gunasekaran; Chanda Laxmana Sudheer; V. Sornagopal; Dr.M. Gnanasekaran. "DESIGN OF 4-BIT MULTIPLIER ACCUMULATOR UNIT BY USING REVERSIBLE LOGIC GATES IN PERES LOGIC". European Journal of Molecular & Clinical Medicine, 7, 9, 2022, 2415-2422.
(2022). 'DESIGN OF 4-BIT MULTIPLIER ACCUMULATOR UNIT BY USING REVERSIBLE LOGIC GATES IN PERES LOGIC', European Journal of Molecular & Clinical Medicine, 7(9), pp. 2415-2422.
DESIGN OF 4-BIT MULTIPLIER ACCUMULATOR UNIT BY USING REVERSIBLE LOGIC GATES IN PERES LOGIC. European Journal of Molecular & Clinical Medicine, 2022; 7(9): 2415-2422.
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